Patent · US Expired

Fabrication of quantum devices in compound semiconductor layers and resulting structures

US5170226A · kind A · utility

12Cited by
7References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 17, 1991
Grant dateDec 8, 1992
Priority date
Expiry dateMay 17, 2011

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S438/962
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Disclosed is a new method suitable for making highly integrated quantum wire arrays, quantum dot arrays in a single crystal compound semiconductor and FETs of less than 0.1 micron gate length. This makes it possible to construct a high-performance electronic device with high speed and low power consumption, using a combination of low-temperature-growth molecular beam epitaxy (LTG-MBE) and focused ion beam (FIB) implantation. The compound semiconductor (GaAs) epitaxial layers, which are made by LTG-MBE, are used as targets of Ga FIB implantation to make Ga wire or dot arrays. Precipitation of arsenic microcrystals, which are initially embedded in a single crystal GaAs layer and act as Schottky barriers, are typically observed in an LTG GaAs layer. A thermal annealing process, after implantation, changes the arsenic microcrystals to GaAs crystals if the arsenic microcrystals are in the region in which the Ga ions are implanted. A wire-like shape free of As microcrystals then acts as a quantum wire for electrons or holes whereas a dot-like shape free of As microcrystals acts as a quantum dot. The co-existence of Ga ions and dopant ions, which provides conductivity type carriers opposi…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.