Fail-resistant solid state interruption system
US5170310A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 1990 |
| Grant date | Dec 8, 1992 |
| Priority date | — |
| Expiry date | Nov 29, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01H9/548
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A solid state circuit interruption arrangement in a distributed power network provides fast and reliable circuit interruption. A common power source provides power to a plurality of loads via respective current paths. A main circuit breaker and a plurality of solid state circuit breakers are arranged to interrupt the current paths in response to command signals sent from a central controller. Current sensors and voltage sensors are coupled to the current paths for monitoring purposes. An automatic controller responds to any of the current sensors detecting a fault condition by automatically generating a command signal, which forces the associated solid state breaker to interrupt the associated current path. Thereafter, the controller automatically generates a signal to the main circuit breaker to interrupt the power provided from the common power source in the event that the associated current path is not interrupted by the solid state breaker. Alternatively, or in addition, the main interruption device may interrupt the current path when its own internal sensing mechanism detects a magnitude of current that is beyond a predetermined level. Also, the controller automatically genera…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.