Three transistor EEPROM cell
US5170373A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 1989 |
| Grant date | Dec 8, 1992 |
| Priority date | — |
| Expiry date | Oct 31, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An EEPROM cell suitable for use in programmable logic devices contains three transistors. A floating gate transistor is used to retain a programmed value using charge storage on the floating gate. A read transistor is connected between the floating gate transistor and an output signal line, and used to access the value stored in the floating gate transistor. A write transistor is connected to the floating gate transistor opposite the read transistor, and is used when programming the floating gate transistor. The write transistor and its associated control circuitry are fabricated to handle the higher programming voltages required by the floating gate device. The read transistor and associated drive circuitry are not required to handle the higher programming voltages, and can be fabricated using smaller, faster devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.