Fault detection and bandwidth monitoring means for a packet switching arrangement
US5170391A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 1990 |
| Grant date | Dec 8, 1992 |
| Priority date | — |
| Expiry date | Oct 10, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5647
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The fault detection and bandwidth monitoring arrangement provides a counter in association with each virtual circuit crosspoint. The counters may be provided with a common or individual threshold value which when exceeded causes alarm signals to be generated. The counter arrangement is arranged to record the averaged imbalance of receive and transmit data at each switch port involved in the virtual circuit connection, and additionally is arranged to measure the difference between the net data flows of the corresponding incoming and outgoing ports. Therefore, it is possible to distinguish between the go/return traffic imbalance and an information loss situation in the switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.