Self-aligned structure and process for DMOS transistor
US5171705A · kind A · utility
19Cited by
11References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 22, 1991 |
| Grant date | Dec 15, 1992 |
| Priority date | — |
| Expiry date | Nov 22, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/126
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Method and structure is disclosed for a high-density DMOS transistor with an improved body contact. The improvement comprises a self-aligned structure in combination with a body contact region which overdopes the source region in order to minimize the number of critical photoresist steps. The use of two dielectric spacers obviates the need for a separate contact mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.