Capacitively induced electrostatic discharge protection circuit

US5173755A · kind A · utility

Assignee

• Western Digital · US

Inventors

• Ramon S. Co · Trabuco Canyon, US
• Kwok Fai V. Lee · Irvine, US
• Kenneth W. Ouyang · Tecate Mission Road, US

Key dates

• Filing date: Jun 3, 1991
• Grant date: Dec 22, 1992
• Expiry date: Jun 3, 2011

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/601

Abstract

An integrated circuit electrostatic discharge (ESD) protection circuit employs a capacitor and a zener diode to trigger a thick oxide ESD shunt field effect transistor (FET). When an ESD induced voltage at an input or output node reaches the turn-on voltage determined by the zener diode breakdown voltage, the shunting transistor is turned on by current capacitively coupled to the base of the parasitic bipolar transistor inherently formed in the thick oxide FET. The parasitic bipolar transistor is turned on in its saturated mode, substantially shorting the node to ground. At the end of the ESD event when the ESD induced current is no longer sufficient to keep the shunting transistor in its saturated mode, the shunting transistor turns off and the ESD protection circuit returns to its off mode, monitoring the input or output node for the occurrence of another ESD event.