Circuit for testing the frequency of a clock in an electronic system
US5175449A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 30, 1991 |
| Grant date | Dec 29, 1992 |
| Priority date | — |
| Expiry date | Aug 30, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R23/15
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A clock frequency tester circuit for determining whether the frequency of a clock (FB) is comprised within a predetermined range (FA-FA/n, FA+FA/n) centered around a reference frequency (FA), is described. The clock frequency tester circuit includes a frequency mixer which provides an output frequency FQ in accordance with the relation: FQ=absolute value of (FA-FB), for a frequency FB close to FA, and a divide-by-n circuit which divides the frequency FB of the clock to be tested. The frequency tester further includes a phase frequency comparator which has a first and second input lead F1 and F2 which are, respectively, connected to the output of the divide-by-n circuit and to the output of the frequency mixer. The phase frequency comparator generates an output signal Q2 which remains at a steady level whenever F1 input signal has a frequency which is higher than that of the input signal F2, i.e., when the frequency FB to be tested is comprised within the range (FA-FA/n, FA+FA/n) (for a frequency FB close to FA). Since the factor n can be easily adjusted, any desired degree of accuracy can be provided by the frequency tester circuit disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.