Apparatus and method for DC offset correction in a receiver
US5175749A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 1991 |
| Grant date | Dec 29, 1992 |
| Priority date | — |
| Expiry date | Jan 25, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/066
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An apparatus automatically corrects for DC offset in a multi-level packet-switched receiver. A reference carrier frequency is used during the receiver's idle mode to establish a DC offset exiting a discriminator (302). The DC offset is amplified by a video amplifier (315) and fed into an error amplifier (320) which generates the negative of the DC offset. The DC offset and the negative of the DC offset are input into a summing network (330) resulting in a zero DC offset exiting the video amplifier (315).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.