Patent · US Expired

Central processing unit in a computer system for controlling a manufacturing line

US5175864A · kind A · utility

9Cited by
8References
5Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 24, 1990
Grant dateDec 29, 1992
Priority date
Expiry dateAug 24, 2010

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02P90/02
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

In a line computer used for controlling a manufacturing line control system, in which a high speed CPU and low speed I/O devices are used, optimum bus timing for signal transmission is generated, which has sufficient time margin to adjust any speed differences between the high speed CPU and the low speed I/O devices. Also, the function of a calender clock is improved so that accurate timing is generated. Furthermore, the display memory in a CRT displaying controller is used effectively so that the number of memory elements is reduced. Moreover, the connection system between the CPU board and the I/O boards or floppy disk drives is improved so that abnormality of the peripheral equipment does not extend to the CPU board. Also, in the invention, a compiler type language, such as the C language, can coexist with an interprepter type language, such as the BASIC language.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.