Patent · US Expired

Arrangement of an integrated circuit on a circuit board

US5177668A · kind A · utility

5Cited by
4References
4Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 18, 1992
Grant dateJan 5, 1993
Priority date
Expiry dateMay 18, 2012

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/15173
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Arrangement of a multi-layer through-contacting integrated circuit board with bonding-wires extending between chip contacts and substrate contacts, particularly designed for a compact circuit assembly of signal processors in an airborne body. The substrate contacts are arranged within a narrow connector strip extending parallel to the boundary of a chip-mounting region, and are in the plane of the substrate surface at approximately the same measurement and geometric sequence as the chip contacts of the circuit. Thin conductive paths extend and spread apart in a fan-like manner from the substrate contacts in an edge strip of the chip-mounting region, and terminate at mutually offset end surfaces of through-holes or vias which have a substantially larger cross-sectional area than the width of the thin conductive paths.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.