High-order, plural-bit-quantization sigma-delta modulators using single-bit digital-to-analog conversion feedback
US5181032A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 9, 1991 |
| Grant date | Jan 19, 1993 |
| Priority date | — |
| Expiry date | Sep 9, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/452
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high-order sigma-delta modulator has a single feedback loop including a linear network and a quantizer, which quantizer comprises a plural-bit analog-to-digital converter, a digital comparator and a single-bit digital-to-analog converter. The linear network comprises a cascade of integrators, a second-order resonator, a cascade of second-order resonators or a cascade of second-order resonators with an additional integrator. The loop behaves much the same as a conventional single-feedback-loop, one-bit sigma-delta modulator, inasfar as the feedback signal is concerned. However, a plural-bit preliminary output signal is available, so the truncation error can be determined. The truncation error is cancelled in the ultimate output signal from the high-order sigma-delta modulator, using additional digital circuitry having the a transfer function analogous to the overall transfer function for input signal of the cascade connection of the linear network, plural-bit analog-to-digital converter in the quantizer, and any scaling circuitry therein or thereafter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.