Interface chip device
US5181201A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 1991 |
| Grant date | Jan 19, 1993 |
| Priority date | — |
| Expiry date | Jan 30, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/128
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interface chip device, provided for use in a time-division multiplex serial data bus system is operable in a processor interface mode and at least one remote mode wherein the device is capable of directly interfacing with I/O devices. The system does not require software or processing capability for protocol communications or I/O control and, consequently, the communications protocol is transparent to the user, system developer or programmer. The communication protocol of the bus system includes a plurality of commands such that when in the remote mode, the chip device determines the validity of each of the commands and provides an echo response message on the data bus in response to each of the commands except for a broadcast command. The remote modes of the chip device include a remote switch mode, a data input mode, a data output mode or a combination of the remote modes. The chip device is divided into six main functional areas: encoder/decoder, message analyzer, protocol sequencer, data storage, control timers, and input/output controller. The chip device may be used in small remote modules that are located in convenient locations adjacent to the loads they are controlling …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.