Current limiting clamp circuit
US5182468A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 1991 |
| Grant date | Jan 26, 1993 |
| Priority date | — |
| Expiry date | May 6, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00195
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A current limiting clamp circuit for providing a clamped voltage at a node and including a P-type MOS transistor and several N-type MOS transistors which are connected in series between the drain of the P-type MOS transistor and ground, with one of the N-type transistors having its gate and drain connected to the drain of the P-type transistor, and having its source connected to the node. In another embodiment, the current limiting clamp circuit includes a pair of P-type transistors and several N-type transistors, with one of the P-type transistors having its source connected to a power supply, its gate connected to ground and its drain connected to the source of the other P-type transistor which has its gate and drain connected to the node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.