Isolation gates to permit selective power-downs within a closely-coupled multi-chip system
US5182810A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 1989 |
| Grant date | Jan 26, 1993 |
| Priority date | — |
| Expiry date | May 31, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A battery-backed ancillary power-management chip, in combination with a battery-backed microprocessor or microcontroller, permits a low-power system to achieve a zero-power standby mode with full nonvolatility. The ancillary chip contains transmission gates which can cut off the connection between two other chips if one of them is turned off. This avoids problems of power leakage, substrate pumping, etc., when two chips which are connected together can be independently powered up or powered down. Also provided is a portable data module, which includes a microprocessor and a large LCD display. The disclosed inventions permit the user to operate the display without powering up the microprocessor (to preserve a complex display, e.g. when the user has provided no inputs for a certain length of time), or to operate the microprocessor without the display (e.g. for data transfer or reduction operations).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.