Vertical current flow semiconductor device utilizing wafer bonding
US5183769A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 1991 |
| Grant date | Feb 2, 1993 |
| Priority date | — |
| Expiry date | May 6, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/135
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An intermediate contact layer (16) is created within a vertical current flow semiconductor device such as an enhanced insulated gate bipolar transistor (EIGBT) (17). An active wafer (11) that is used for forming active elements of the device is wafer bonded to a conductor (16) that is on a surface of a substrate wafer (12). The wafer bonding not only forms the intermediate contact layer (16) but also diffuses a series of P (18) and N (19) regions into the active wafer (11) thereby forming ohmic contacts between the P (18) and N (19) regions and the intermediate contact layer (16). The substrate wafer (12) provides support for the active wafer (11) during subsequent wafer processing operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.