Method of manufacturing semiconductor device
US5183781A · kind A · utility
13Cited by
1References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 8, 1991 |
| Grant date | Feb 2, 1993 |
| Priority date | — |
| Expiry date | Jan 8, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/131
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process of forming an interconnection layer of polysilicon in a contact hole formed in an interlayer insulating film comprises opening the contact hole, depositing doped and nondoped polysilicon films in sequence, and etching back the polysilicon films by the reactive ion etching technique with at least one carbon fluoride gas to obtain the interconnection layer buried in the contact hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.