Integrating A/D converter with means for reducing rollover error
US5184128A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 6, 1991 |
| Grant date | Feb 2, 1993 |
| Priority date | — |
| Expiry date | Aug 6, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/52
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved integrating type A/D converter has a set of analog switches and a control logic unit for selectively connecting a pair of input terminals for an unknown analog input voltage signal with a pair of input leads across a buffer and integrator in order to apply, first in an integrate phase, the analog input signal in a polarity direction that causes the integrator to ramp up in the same direction regardless of the polarity of the analog input signal, and then in a deintegrate phase, reference voltages are applied across the input leads in a fixed direction opposite to the applied input voltage such that a zero crossing signal is output by the comparator. The ramping-up and ramping-down of the integrator in the same direction eliminates rollover error in the A/D reading of inputs of different polarities but of the same magnitude. The invention is particularly useful for monolithic A/D converters using BiMOS technology. The preferred embodiment performs a subdivided measurement of a number of integrate/deintegrate phases of the analog input signal, and a second, residual error measurement using a pair of storage capacitors with capacitances in a predetermined multiplier ratio.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.