Self-aligned, self-passivated advanced dual lift-off heterojunction bipolar transistor method
US5185274A · kind A · utility
11Cited by
4References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 15, 1991 |
| Grant date | Feb 9, 1993 |
| Priority date | — |
| Expiry date | Aug 15, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Heterojunction bipolar transistor is formed by using a common photoresist mask for self-aligning all critical dimensions including emitter and emitter contact to base contact to proton damaged collector regions beneath base contact and to passivate emitter periphery at same time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.