Method of making severable conductive path in an integrated-circuit device
US5185291A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 1991 |
| Grant date | Feb 9, 1993 |
| Priority date | — |
| Expiry date | Sep 6, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/055
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated-circuit devices are provided with conductive paths or links which, by laser irradiation or electric current pulsing, can be severed or fused. In the interest of ease of fusing, preferred links have locally reduced thickness as achieved, e.g., by employing two steps of layer deposition and etching as follows: first, a layer of conductor material is deposited on a dielectric surface, and locally reduced in thickness by etching at one or several points selected for fusing, and, second, a further layer of conductor material is deposited, and then etched to produce a desired conductive path passing through such points.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.