Multiplexer circuit having a simplified construction and reduced number of parts
US5189312A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | May 24, 1991 |
| Grant date | Feb 23, 1993 |
| Priority date | — |
| Expiry date | May 24, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/62
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multiplexer circuit comprises a plurality of voltage generation circuits which produce corresponding output voltages having respective, different voltage levels in accordance with an ordered sequence thereof, from the lowest to the highest level. The outputs of the plurality of voltage generation circuits are supplied to a common output line. A decoder circuit receives a control data input signal which designates a selected one of the plurality of levels of the output signal and produces a signal for disabling each of the voltage generating circuits having an output voltage level of a higher order than that of the voltage generating circuit producing the output voltage of the selected level designated by the control data input signal. Voltage generating circuits of lower order need not be disabled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.