High density memory array packaging
US5191404A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 1991 |
| Grant date | Mar 2, 1993 |
| Priority date | — |
| Expiry date | Sep 30, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10946
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A low-profile, high-density package for intergrated circuit chips is provided. A first multichip memory module includes first and second interconnect members having low-profile memory chips mounted on a first side of each member. Low-profile edge clips are employed to mechanically connect a second side of the second member to a second side of the first member, and to electrically connect the first sides of the members to a first surface of a circuit board. Likewise, a second multichip memory module includes first and second interconnect members having low-profile memory chips mounted to a first side of each member. Low-profile edge clips are employed to mechanically connect the second sides of the members, and to electrically connect the first sides of the members to a second surface of the circuit board. A thermal management technique that distributes thermal loads is thereafter applied to create a high-density package capable of insertion into a standard computer backplane and cabinet.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.