Method of making a extended integration semiconductor structure
US5192716A · kind A · utility
84Cited by
19References
106Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 24, 1991 |
| Grant date | Mar 9, 1993 |
| Priority date | — |
| Expiry date | Jul 24, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/4913
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A low cost, lightweight, fast, dense and reliable extended integration semiconductor structure is provided by forming a thin film multilayer wiring decal on a support substrate and aligning and attaching one or more integrated chips to the decal. A support ring is attached to the decal surrounding the aligned and attached integrated substrate, and the support substrate is removed. Reach-through vias connect the decal wiring to the chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.