Multilayer ceramic substrate for mounting of semiconductor device
US5196089A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 1991 |
| Grant date | Mar 23, 1993 |
| Priority date | — |
| Expiry date | Aug 28, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0733
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a method of fabricating a multilayered interconnection for integrated circuit package, a coating of a metallized conductive pattern is formed on an upper surface of the substrate. A plurality of vertical copper studs are formed on the substrate for an interconnection with the metallized conductive pattern. A polyimide slurry is provided on the surface of the substrate to cover each top surface of the conductive studs. An upper surface of the polyimide slurry is polished to expose each top surface of the copper studs. A masking film is provided on each top surface of the copper studs prior to supplying an intermediate derivative of a polyimide polymer. The masking film works to protect the intermediate derivative against an chemically reaction with the copper studs to avoid a chelate compound from being produced at the time of heating step followed; A coat of the intermediate derivative of the polyimide polymer is provided entirely on the polished surface of the polyimide slurry, and is heated to form a coating of a polyimide layer. Then the coating of the polyimide layer is partly removed to expose portions corresponding to each top surface of the copper studs. The masking film …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.