Method for manufacturing BICMOS devices
US5196356A · kind A · utility
28Cited by
9References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 27, 1992 |
| Grant date | Mar 23, 1993 |
| Priority date | — |
| Expiry date | Apr 27, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/009
Abstract
A method for BICMOS devices is disclosed, wherein an emitter and a base of a vertical PNP transistor are self-aligned, an extrinsic base is formed by adapting a base electrode polysilicon layer as a diffusion source, and the base electrode and an intrinsic base are coupled by diffusion of N type impurities adapting the N.sup.+ polysilicon as a diffusion source, so that the manufacturing process is simplified and the resistance of the extrinsic base is reduced.
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