Substrate for packaging a semiconductor device having particular terminal and bump structure
US5196726A · kind A · utility
231Cited by
4References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 23, 1991 |
| Grant date | Mar 23, 1993 |
| Priority date | — |
| Expiry date | Jan 23, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/4007
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A substrate for packaging a semiconductor device having a bump thereon according to the present invention is characterized by that the substrate has an electrode terminal to which the bump is to be connected, the electrode terminal has a recess formed thereon to the receive at least a top of the bump, and at least a top of the surface of the electrode terminal is covered by a metal layer having a lower melting point than that of the bump.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.