Computer architecture for the concurrent execution of sequential programs
US5197137A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 1989 |
| Grant date | Mar 23, 1993 |
| Priority date | — |
| Expiry date | Jul 28, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/45
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system processes mixed control, indexing and data manipulation instructions in groups of N instructions at a time. A group of instructions is applied to a set of N Dispatch units which execute the control and indexing instructions directly. The Dispatch Units convert data manipulation instructions into a more primitive data flow operations. The data flow operations are applied to a set of M Execution Units which process the operations concurrently by observing data dependency constraints. The data used by the control and indexing instructions is stored in a group of identical memory structures which are accessible by each of the Dispatch Units. Data for the data manipulation instructions is stored in a data structure which is divided among the Execution Units.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.