Method of forming high performance lateral PNP transistor with buried base contact

US5198376A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Sridhar Divakaruni · South Burlington, US
• Badih El-Kareh · Colchester, US
• Eric Johnson · Mill Valley, US

Key dates

• Filing date: Jul 7, 1992
• Grant date: Mar 30, 1993
• Expiry date: Jul 7, 2012

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/096

Abstract

A high performance PNP lateral bipolar transistor is described, incorporating at least two trenches extending from the upper P.sup.- surface of a semiconductor substrate almost to a buried N.sup.+ layer. The floor of one trench is heavily N-doped to establish a connection between the buried N.sup.+ layer and an N.sup.- diffusion in the walls of the trench. When the trenches are backfilled with P.sup.+ polysilicon a lateral PNP is formed having a buried base contact.