Semiconductor wafer with circuits bonded to a substrate
US5198695A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 1990 |
| Grant date | Mar 30, 1993 |
| Priority date | — |
| Expiry date | Dec 10, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A bonded structure is described consisting of a semiconductor wafer, preferably gallium arsenide, soldered to a substrate material. A method for forming the structure is also described. The structure provides mechanical support and thermal conductivity for the wafer, as well as a multitude of connections through the substrate material at predetermined locations on the wafer. The substrate material and the soldering process are selected to minimize the resulting stresses in the wafer. A pattern of pads consisting of a refractory metal covered by a solder material is formed on the substrate to maintain space for excess solder in order to avoid the shorting of the individual connections on the wafer, and to control the size and location of voids in the solder upon solidification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.