Method for the self-alignment of metal contacts on a semiconductor device, and self-aligned semiconductors
US5200357A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 1991 |
| Grant date | Apr 6, 1993 |
| Priority date | — |
| Expiry date | Jun 6, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method for making self-aligned metal contacts on semiconductor devices, with a submicronic spacing between regions controlled by the contacts. On a semiconductor body supporting at least one raised pattern, a double layer of SiO.sub.2 and Si.sub.3 N.sub.4 is deposited by an isotropic method. A double ionic etching of Si.sub.3 N.sub.4 by SF.sub.6 and of SiO.sub.2 by CHF.sub.3 is done to insulate the sidewalls on the flanks of the pattern. A sub-etching by HF/NH.sub.4 F/H.sub.2 O creates a cap beneath each sidewall. The metal contacts, deposited by evaporation, are self-aligned and separated by a space "d" equal to the thickness of the insulating layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.