Digital data processing apparatus using daisy chain control
US5201029A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 24, 1992 |
| Grant date | Apr 6, 1993 |
| Priority date | — |
| Expiry date | Mar 24, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Digital data processing apparatus for use as a three-layer perceptron comprises three sets of processing cells (29A-29D, 29E-29H, 29I-29L). The data inputs of the cells of each set are connected to a respective common data bus (30,32,33) and the data outputs of the cells of each set are connected to a respective common data bus (32,33,34). Input data applied sequentially to the input bus (30) are processed in parallel by the cells (29A-29D) of the first set under the control of a clock pulse generator arrangement (35) which controls synchronized read-out of respective weighting factors from a store included in each cell, accumulation of the thus weighted items of input data, latching of the processing result in each cell, and subsequent read-out of the latched results onto the relevant output bus (32). The read-out results constitute input data for the cells (29E-29H) of the next set, which operate in the same way, as do the cells (29I-29L) of the final set. As an alternative a single set may be used recursively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.