Data link controller with channels selectively allocatable to hyper channels and hyper channel data funneled through reference logical channels
US5206933A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 1990 |
| Grant date | Apr 27, 1993 |
| Priority date | — |
| Expiry date | Mar 15, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/324
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An integrated data link control device (IDLC) interfaces between a host computer system and external channels in a communication network. The device contains multiple internal channels allocatable individually to interface to the external channels, each internal channel having internal buffer memory reserved to it for storing data signals handled by it. The device also includes facilities for selectively configuring groups of its internal channels into "extended channels", some of which are termed Hyper Channels. Channels in each extended channel group interface collectively and in time coordination to one external channel, presenting an effective bandwidth to the external channel which is greater than the bandwidth of any single internal channel. One channel in each group is designated as a reference channel for the group, and all data signals transferred between the group and the assigned external channel are funneled through only the buffer memory assigned to the respective reference channel; in order to ensure that such signals are transferred between the external channel and the host system in their correct "message" sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.