Optimized pointer control system
US5210760A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 15, 1991 |
| Grant date | May 11, 1993 |
| Priority date | — |
| Expiry date | Feb 15, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2220/90
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Pointer control logic for error correcting codes includes a set of registers the contents of which are rotated whenever data from a track with a pointer are processed. In that manner, a given one register always contains pointer data for the track under consideration (if that track has a pointer). The pointer control logic includes programmable initializing values to stress write operations as desired. Further, the logic contains multiple and programmable pointer dropping thresholds so that pointer registers can be candidates for dropping dependent on the type of error encountered. Provision is made for extending pointer life when errors are encountered, registers are full, and no register has dropped below the pointer dropping threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.