Data processing system having apparatus for increasing the execution speed of bit field instructions
US5210835A · kind A · utility
6Cited by
6References
20Claims
0Family size
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Inventors
Key dates
| Filing date | Jan 2, 1990 |
| Grant date | May 11, 1993 |
| Priority date | — |
| Expiry date | Jan 2, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In addition to an ordinary bit field instruction without limitation which makes use of an offset value and a field width, a bit field instruction with limitation which does not calculate the spread of the bit field is separately installed. In the present invention the calculation for determination of the spread of the bit field is not performed when the bit field instruction with limitation is executed. In addition, when executing a bit field instruction with limitation, the offset value and the field width can be obtained directly as immediate values thereby decreasing the execution time of the instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.