Differential output, power, CMOS, operational amplifier
US5212455A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 1991 |
| Grant date | May 18, 1993 |
| Priority date | — |
| Expiry date | Dec 19, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45722
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power CMOS operational amplifier with a differential output, having an intrinsically stable current absorption under rest conditions, comprises two symmetric branches, each comprising a first folded cascode input inverting stage, a level shifting circuit, a second currant mirror type noninverting amplifying stage and a third output inverting stage, constituted by a complementary pair of transistors, connected in a common source configuration between the supply rails and driven by the output of the second noninverting stage and by the output of the level shifting circuit. Frequency compensation is accomplished by means of two capacitors connected between each of the two output terminals of the amplifier and the output of the first inverting stage and a node of the output branch of the noninverting current mirror stage. A single common mode feedback network stabilizes both symmetric branches of the amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.