Message-driven processor in a concurrent computer
US5212778A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 27, 1988 |
| Grant date | May 18, 1993 |
| Priority date | — |
| Expiry date | May 27, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A message-driven concurrent computer system stores incoming messages in a row buffer and then in a queue in main memory. A translator cache is also located in main memory, and output from the cache is through a set of comparators. Both the queue and cache are addressed in a wraparound fashion by hardware. An instruction buffer holds an entire row of instructions from memory. Translate, suspend and send instructions are available to the user. Tags provide for synchronization when objects are retrieved from remote processors and identify addresses as being physical addresses of a local processor or a node address of a remote processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.