Semiconductor integrated circuit device having a signal transmission line pair interconnected by propagation delay time control resistance
US5214318A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 1991 |
| Grant date | May 25, 1993 |
| Priority date | — |
| Expiry date | Jan 7, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit device has, in one embodiment, a pair of signal transmission lines formed over and insulated from a semiconductor substrate, a first circuit formed in the semiconductor substrate and electrically connected with one end of the pair of signal transmission lines for sending an electric signal, and a second circuit formed in the semiconductor substrate and electrically connected with the other end of the pair of signal transmission lines for receiving the electric signal propagating over the transmission line pair. A control resistance is electrically connected between the pair of transmission lines at the above-mentioned other end for controlling a delay time of the signal propagating over the pair of signal transmission lines between the opposite ends of the pair of signal transmission lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.