Electrostatic discharge protective circuit of shunting transistors
US5214562A · kind A · utility
7Cited by
10References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 14, 1991 |
| Grant date | May 25, 1993 |
| Priority date | — |
| Expiry date | Jun 14, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/046
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An electrostatic discharge protective apparatus for an integrated circuit having normally on semiconductor devices mutually connecting input/output pads and the power in bonding pad to prevent stray electrostatic discharges from damaging the integrated circuit components when the integrated circuit is not powered on. All adjacent input/output pads are connected to each other by a normally on transistor. Each pad is additionally connected to a power supply pad by a normally on transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.