Line disturbance monitor and recorder system
US5216621A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 28, 1991 |
| Grant date | Jun 1, 1993 |
| Priority date | — |
| Expiry date | Feb 28, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/50
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A fault detection system for monitoring at least one operating parameter of an AC power transmission line includes current and/or voltage transducers connected to the transmission line for providing an analog signal representative of at least one time varying parameter of the AC power transmission. An analog-to-digital (A/D) converter samples the analog signal and produces digital sample words representing the signal. The digital sample words are provided by a data bus to a high speed DSP module which includes a number of fault trigger components for operating on the digital sample words to detect a disturbance. The DSP module generates a trigger signal when a disturbance is detected by one of the fault trigger components. The digital sample words are also provided to a DMA component, resident within a host CPU, which implements a memory allocation protocol to sequentially address a plurality of memory zones in a loop for sequential storage of the digital sample words in the discrete storage locations of the addressed memory zone. According to a fault condition memory allocation protocol, the DMA component removes at least one of the plurality of memory zones from the loop addressa…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.