Protection of analog reference and bias voltage inputs

US5218506A · kind A · utility

Assignee

• Mitel Corporation · CA

Inventor

• Colin Harris · New Westminster, CA

Key dates

• Filing date: Dec 28, 1989
• Grant date: Jun 8, 1993
• Expiry date: Dec 28, 2009

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/811

Abstract

A latchup and electrostatic discharge protection circuit for an analog reference or bias voltage power supply input connected between an input power providing terminal of the power supply and a power rail of a CMOS integrated circuit having a parasitic latch device. The protection circuit comprised of three field effect transistors close-circuits a path from the power supply input to the power rail for normal power supply conditions and open-circuits the path for excessively positive and negative voltages at the power supply input, thereby safeguarding the CMOS integrated circuit from currents resulting from the excessive positive and negative voltages.