Process for preparing semiconductor device
US5219767A · kind A · utility
6Cited by
3References
3Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 22, 1991 |
| Grant date | Jun 15, 1993 |
| Priority date | — |
| Expiry date | Aug 22, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/969
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a process for preparing a semiconductor device which comprises a step of growing, in a molecular beam epitaxial growth apparatus, a P-type silicon epitaxial layer which becomes the base, on an N-type silicon epitaxial layer which becomes the collector; a step of growing, in a molecular beam epitaxial growth apparatus, an antimony doped N-type silicon amorphous layer which becomes the emitter, on said P-type silicon epitaxial layer; and a step of converting the above N-type silicon amorphous layer to an N-type silicon epitaxial layer by the solid phase epitaxy method according to the annealing heat treatment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.