Pixel protection mechanism for mixed graphics/video display adaptors
US5220312A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 1989 |
| Grant date | Jun 15, 1993 |
| Priority date | — |
| Expiry date | Sep 29, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2340/125
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A locking mechanism is incorporated in a high-resolution video display system including a monitor, a computer for providing controls signals to said display system and two frame buffers, one for storing computer generated graphics images and one for storing video data both of said buffers being operable under control of said computer for reading out data to the monitor. The locking mechanism includes an output lock functionally located between the output of both of the frame buffers and the monitor for preventing video data from overwriting graphics data on said monitor screen. An input lock is also provided for preventing static video data stored in predetermined regions of the video frame buffer from being continually overwritten by motion video data being continually supplied to the video frame buffer. The output lock utilizes an extra bit-plane in the video buffer which stores a predetermined lock pattern and utilizes the normal monitor output port of the buffer operating under control of standard frame buffer addressing circuitry in combination with straight-forward combinational logic to achieve the locking function. The input lock utilizes a small DRAM which stores the input…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.