Multicomponent integrated circuit package
US5220489A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 11, 1991 |
| Grant date | Jun 15, 1993 |
| Priority date | — |
| Expiry date | Oct 11, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10689
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic package, comprising a circuit carrying substrate (30) and a semiconductor device (35). The substrate (30) has two opposing surfaces, the first or bottom surface having a plurality of solder pads (31) and the second or top surface having a circuitry pattern defined on it. A semiconductor device (35) is attached to the top surface of the circuit carrying substrate (30). A molded body (33) is formed completely around the semiconductor device (35) in order to encapsulate it, the molded body also substantially covering the top surface of the circuit carrying substrate (30). A layer of metal deposited directly on the molded body and the top surface of the circuit carrying substrate is delineated into another conductive circuitry pattern (38), with part of the pattern (36) connected to the circuitry pattern on the circuit carrying substrate. An electronic component (32) is mounted on the molded body (33) and electrically connected to the conductive circuitry pattern (38).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.