Method and apparatus for preventing overerasure in a flash cell
US5220533A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 6, 1991 |
| Grant date | Jun 15, 1993 |
| Priority date | — |
| Expiry date | Nov 6, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for erasing Flash EPROM cells that avoids overerasure is provided. A high-impedance device is placed between the drain of the cell and the high-voltage supply used to erase the cell. As soon as the cell enters the onset of depletion and begins to conduct, most of the high voltage is dropped across the high-impedance device, leaving insufficient potential across the cell for Fowler-Nordheim tunneling to continue. The erase process is thus self-limiting. The process can be used on a chain or array of EPROM cells, with erasure stopping when any one of the cells conducts. Bias differences between erase and read modes assure that the cell that first goes into depletion is not in depletion in normal operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.