Digital data link performance monitor
US5220581A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 1991 |
| Grant date | Jun 15, 1993 |
| Priority date | — |
| Expiry date | Mar 28, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L43/16
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A digital data link performance monitor technique for communication systems and information and data processing systems is disclosed. The technique is based on the integration and analysis of a plurality of sorted data edge transitions of a serial data stream received over the digital data link. The number of data edge sorts to each of n time intervals definitive of the edge histogram is compared with a predetermined threshold level and a monitor signal is generated with each comparison. The combination of monitor signals is then analyzed to determine the amount of data timing jitter, and therefore the quality of the link. Corresponding methods and circuits are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.