System and method for reducing timing channels in digital data processing systems
US5220661A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 1992 |
| Grant date | Jun 15, 1993 |
| Priority date | — |
| Expiry date | Jan 14, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/542
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital computer system for processing at least one process, said process generating operational requests for enabling selected operations. The computer system comprises a timer portion for generating two series of unpredictable timing indications. An operational processor portion is responsive to the timing indications from said timer and the operational requests for initiating operations enabled by the operational requests in response to one of the series of timing indications. The operational processor communicates with the processes regarding operations enabled with respective operational requests in response to the second series of timing indications. Since the timings of the operations by the operational processor are distinct from the timings of the communications between the operational processor and the process, the process is unable to determine timing information from the operations performed by the operational processor in response to the operational requests, thereby ensuring that the process will be unable to use the timings of the operations by the operational processor to determine timing intervals. In another aspect, the digital computer system includes a system …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.