Process for preparing multi-layer printed wiring board
US5220723A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 4, 1991 |
| Grant date | Jun 22, 1993 |
| Priority date | — |
| Expiry date | Nov 4, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49126
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a process for preparing a multi-layer printed wiring board including the step of forming a through hole and an external layer circuit on a laminated board of double-sided or multi-layer construction. Then the laminated board is coated over the whole front and back surfaces with a paste-like heat-resistant resin, simultaneously filling the through hole with a resin. A copper foil is disposed on the whole front and back surfaces of the laminated board. Next, the arrangement is heated and pressure-molded in a vacuum. The copper foil is then removed to form an intermediate laminated board. Then, multilayer molding of at least two sets of intermediate laminated boards with a prepreg interposed therebetween is preformed via a step of heat and pressure-molding. In using the penetrated through hole as the divided via hole, there is no longer a restriction of the thickness of the respective divided via holes on the same lattice point. Thus, it has become possible to use the via holes in a higher multilayer board, dramatically improving wiring capacity over the prior art divided via holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.