Strained defect-free epitaxial mismatched heterostructures and method of fabrication
US5221367A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 1988 |
| Grant date | Jun 22, 1993 |
| Priority date | — |
| Expiry date | Aug 3, 2008 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/938
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Heterostructures having a large lattice mismatch between an upper epilayer and a substrate and a method of forming such structures having a thin intermediate layer are disclosed. The strain due to a lattice mismatch between the intermediate layer and the substrate is partially relieved by the formation of edge type dislocations which are localized and photoelectrically inactive. Growth of the intermediate layer is interrupted before it reaches the thickness at which the left over strain is relieved by 60 degree type threading dislocations. The upper epilayer is then grown in an unstrained and defect-free condition upon the intermediate layer where the unstrained lattice constant of the epilayer is about the same as the partially relieved strain lattice constant or the intermediate layer. An unstrained defect-free epilayer of InGaAs has been grown on a GaAs substrate with an intermediate layer 3-10 nm in thickness of InAs. Other large mismatch systems are disclosed, including, GaAs on Si with an intermediate layer of GaInAs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.