Method of modifying a microinstruction with operands specified by an instruction held in an alias register
US5222244A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 1990 |
| Grant date | Jun 22, 1993 |
| Priority date | — |
| Expiry date | Dec 20, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/35
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An aliasing logic (100) in an instruction decoder. If a complex microinstruction flow is in progress, it operands can be accessed through alias registers (116). This allows indirect access to a source or destination register specified by the operands of the macrocode instruction or the opcode of the macroinstruction while executing a sequence of microinstructions. These aliased operands are maintained by the macroinstruction aliasing logic (100) in the register (116). The instruction decoder issues new instructions by driving a machine bus (110) with the correct information during each clock cycle. Mousetrap multiplexer (104) chooses between several sources of opcode and operand fields and routes the them to the machine bus (110) through several translation stages and multiplexers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.