Method of manufacturing a III-V semiconductor device using a self-biased substrate and a plasma containing an electronegative species
US5223458A · kind A · utility
14Cited by
14References
21Claims
0Family size
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Key dates
| Filing date | Sep 30, 1992 |
| Grant date | Jun 29, 1993 |
| Priority date | — |
| Expiry date | Sep 30, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/958
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A passivation technique which significantly reduces degradation in reverse breakdown voltage characteristics usually introduced by passivation of active regions of field effect transistors is described. The technique uses a surface treatment in a plasma to introduce into the surface an electro-negative species to maintain negative surface potential of the surface subsequent to encapsulation by the passivation material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.