Power supply supervisor with independent power-up delays and a system incorporating the same
US5224010A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 1991 |
| Grant date | Jun 29, 1993 |
| Priority date | — |
| Expiry date | Aug 21, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H3/247
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A power supply monitoring circuit, and a data processing system incorporating the same together with a regulated power supply and system components such as a CPU, are disclosed. The power supply monitoring circuit includes delay circuits, with the respective delays selected by the selection of capacitor values, for delaying the issuing of a "power-good" signal to the CPU after power-up until sufficient time has passed after establishment of adequate voltages on the power supply bus to allow the power supplies to stabilize, and for ignoring undervoltage faults (in generating a power supply shutdown signal) on said power supplies for a brief period of time after power-up. The stabilization and power-up delay periods may be selected independently from one another, so that the power-up delay can expire prior to the expiration of the stabilization delay. In this way, the power supply can be promptly turned off if an undervoltage condition is present during power-up, reducing the risk of component damage from absence of adequate power supply voltages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.